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2 mhz, synchronous boost dc - to - dc converter data sheet adp1607 rev. c document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other right s of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property o f their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2012 C 2013 analog devices, inc. all rights reserved. technical support www.analog.com features up to 9 6 % efficiency 0.8 v to v out input voltage range low 0.9 v input start - up voltage 1.8 v to 3.3 v output voltage range 23 a quiescent current fixed pwm and light load pfm mode options synchronous rectification true shutdown output isolation internal soft start, compensation, and current limit 2 mm 2 mm, 6 - lead lfcsp c ompact solution size applications 1 - cell and 2 - cell alkaline and nimh/nicd powered devices portable audio players, instruments, and medical devices solar cell applications mini ature hard disk power supplies power led status indicators general description the adp1607 is a high efficiency, synchronous, fixed frequency, step - u p dc - to - dc switching converter with an adjustable outpu t voltage between 1 .8 v and 3.3 v for use in portable applications. the 2 mhz operating frequency enables the use of small footprint, low profile external components. additionally, the synchronous re ctification, internal compensation, internal fixed current limit, and current mode architecture allow for excellent transient response and a minimal external part count. other key features include fixed pwm and light load pfm mode options, true output iso lation, thermal shutdown (tsd), and logic controlled enable. available in a lead - free, thin, 6 - lead lfcsp package, the adp1607 is ideal for providing efficient power conversion in portable devices. typical application circuit 10276-001 adp1607 1 2 3 vin en 5 sw 6 vout fb on off 4 gnd adjustable output voltage 1.8v to 3.3v input voltage 0.8v to v out l 2.2h c in 10f c out 10f r1 r2 figure 1.
adp1607 data sheet rev. c | page 2 of 1 6 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 typical application circuit ............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 thermal operating ranges ......................................................... 4 thermal resistance ...................................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 6 theory of operation ...................................................................... 10 overview ..................................................................................... 10 enable/shutdown ....................................................................... 10 modes of operation ................................................................... 10 internal control features .......................................................... 11 applications information .............................................................. 12 setting the output vol tage ........................................................ 12 inductor selection ...................................................................... 12 choosing the input capacitor .................................................. 13 ch oosing the output capacitor ............................................... 13 layout guidelines ........................................................................... 14 outline dimensions ....................................................................... 15 ordering guide .......................................................................... 15 revision history 1 2 /13 rev. b to rev. c changes to figure 21 ........................................................................ 9 7/13 rev. a to rev. b changes to captions for figure 22 and figure 23 ........................ 9 changed synchronous rectification section .............................. 11 12/12 rev. 0 t o rev. a changes to features section ............................................................ 1 changed t j to t a in specifications section ................................... 3 changed figure 6, figure 7, and figure 8 cap t i o n s ..................... 6 changes to table 5 .......................................................................... 1 2 changes to choosing the output capacitor section ................. 1 3 10/ 12 rev ision 0: initial version
data sheet adp1607 rev. c | page 3 of 16 specifica tions v in = v en = 1.2 v, v out = 3.3 v at t a = ?40 c to +85 c for minimum/maximum specifications , and t a = 25 c for typical specifications, unless otherwise noted. 1 table 1 . parameter symbol test conditions/comments min typ max unit supply minimum start - up voltage 2 r min = 22 0.9 v operating input voltage range 3 v in 0.8 v out v shutdown current i qsd v en = gnd, v out = gnd, t a = ?40c to +45c 4 0.06 0.67 a quiescent current non switching, measured on vout , auto operating mode part only t a = ?40c to +45c 23 29 a t a = ?40c to +85c 23 40 a measured on vin t a = ?40c to +45c 6 11 a t a = ?40c to +85c 6 14.6 a soft start time 1.3 ms switch current limit i cl 0.8 1 1.3 a nmos on resistance r dson_n i sw = 500 ma 116 165 m pmos on resistance r dson_p i sw = 500 ma 155 225 m sw leakage current v sw = 1.2 v, v out = 0 v, t a = ?40c to +45c 4 0.18 2 a oscillator switching frequency f sw 1.8 2 2.2 mhz maximum duty cycle d max 85 90 % output vout range v out 1.8 3.3 v fb pin voltage v fb pwm mode 1.2338 1.259 1.2842 v fb pin current i fb v fb = 1.26 v 0.1 0.25 a en/mode logic input voltage threshold low v il 0.25 v input voltage threshold high v ih 0.8 v en/mo de leakage current v en = gnd or vin, v out = 0 v 0.001 0.25 a thermal shutdown 5 thermal shutdown threshold 150 c thermal shutdown hysteresis 15 c 1 all limits at temperature extremes are guaranteed via correlation using standard s tatistical q uality c ontrol (sqc). specifications are subject to change without notice. 2 guaranteed by design, but not productio n tested. vin can never exceed vout once the adp1607 is enabled. 3 minimum value is characterized by design. maximum value is characterized on the bench. 4 this parameter is the semiconductor leakage current. t he semiconductor l eakage current double s with every 10c increase in temperature. the maximum limit follow s the same trend over temperature. 5 thermal shutdown protection is only active in pwm mode.
adp1607 data sheet rev. c | page 4 of 16 absolute maximum rat ings table 2 . parameter rating vin, vou t to gnd ? 0.3 v to +3.6 v fb to gnd ? 0.3 v to +1.4 v en, sw to gnd (when vin vout) ?0.3 v to vin + 0.3 v en, sw to gnd (when vin < vout) ?0.3 v to vout + 0.3 v epad to gnd ?0.3 v to + 0.3 v operating ambient temperature range ?40c to +85c operati ng junction temperature range ?40c to +90 c storage temperature range ?65c to +150c soldering conditions jedec j - std -020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only ; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply individually only, not in combination. thermal operating ra nges the adp160 7 can be damaged when the junction temper - ature limits are exceeded. the maximum operating junction temperature (t j(max) ) takes precedence over the maximum operating ambient temperature (t a(max) ). monitoring ambient temperature does not guarantee that the junction temperature (t j ) is within the specified temperature limits. in applications with high power dissipation and poor pcb thermal resistance, the maximum ambient temperature may need to be derated. in applications with moderate power dissipation and low pcb thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. the junction temperature t j of the device is depende nt on the ambient temperature (t a ) , the p o wer dissipation of the device (p d ), and the junction - to - ambient thermal resistance of the package ( ja ). maximum junction temperature ( t j ) is calculated from the ambient temperature ( t a ) and power dissipation ( p d ) using the following formula: t j = t a + ( p d ja ) thermal resistance junction - to - ambient thermal resistance ( ja ) of the package is specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. the junction - to - ambient thermal resistance is highly dependent on the application and board layout. in applications whe re high maximum power dissipation exists, attention to thermal board de sign is required. the value of ja may vary, depending on pcb material, layout, and environmental conditions. ja and jc (junction to case) are determined according to jesd51 - 9 on a 4 - layer pcb with natural convection cooling and the exposed pad soldered to the board with thermal vias. table 3 . package type ja jc unit 6 - lead lfcsp 66.06 4.3 c/w esd caution
data sheet adp1607 rev. c | page 5 of 16 pin configuration and fu nction descriptions 10276-002 3 fb 1 vin 2 en 4gnd 7 epad 6vout 5sw adp1607 top view (not to scale) notes 1. connect the exposed pad to gnd. figure 2. pin configuration table 4. pin function descriptions pin no. mnemonic description 1 vin analog and power supply pin. 2 en shutdown control pin. drive en high to turn on the synchronous boost, drive en low to turn it off. 3 fb output voltage feedback pin. 4 gnd analog and power ground pin. 5 sw drain connection for nmos and pmos power switches. 6 vout output voltage and source co nnection of pmos power switch. 7 epad exposed pad. connect to gnd.
adp1607 data sheet rev. c | page 6 of 16 typical performance characteristics v in = 1.2 v, v out = 3.3 v, l = 2.2 h ( dcr max = 66 m?, vlf302512mt - 2r2m ), c in = 10 f , c out = 10 f (10 v, 20%, lmk107bj106malt ), v en = v in , and t a = 25c, unless otherwise noted. 100 80 60 40 20 90 70 50 30 10 0 0.1 1 10 100 1000 efficiency (%) load current (ma) v out = 1.8v v in = 0.8v v in = 1.2v v in = 1.5v 10276-003 figure 3. auto mode efficiency vs. load current, v out = 1.8 v 100 80 60 40 20 90 70 50 30 10 0 0.1 1 10 100 1000 efficiency (%) load current (ma) v out = 2.5v v in = 0.8v v in = 1.2v v in = 1.5v v in = 2.2v 10276-004 figure 4. auto mode efficiency vs. load current, v out = 2.5 v 100 80 60 40 20 90 70 50 30 10 0 0.1 1 10 100 1000 efficiency (%) load current (ma) v out = 3.3v v in = 0.8v v in = 1.2v v in = 1.5v v in = 2.2v v in = 3.0v 10276-005 figure 5. auto mode efficiency vs. load curr ent, v out = 3.3 v 0.1 1 10 100 1000 output voltage (v) load current (ma) v out = 1.8v 1.78 1.79 1.80 1.81 1.82 1.83 1.84 v in = 0.8v v in = 1.2v v in = 1.5v 10276-006 figure 6. auto mode output voltage load regulation , v out = 1.8 v 0.1 1 10 100 1000 output voltage (v) load current (ma) v out = 2.5v 2.47 2.48 2.49 2.50 2.51 2.52 2.53 2.54 2.55 2.56 v in = 0.8v v in = 1.2v v in = 1.5v v in = 2.2v 10276-007 figure 7. auto mode output voltage load regulation , v out = 2.5 v 0.1 1 10 100 1000 output voltage (v) load current (ma) v out = 3.3v 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 v in = 0.8v v in = 1.2v v in = 1.5v v in = 2.2v v in = 3.0v 10276-008 figure 8. auto mode o utput voltage load regulation , v out = 3.3 v
data sheet adp1607 rev. c | page 7 of 16 30 27 24 21 18 15 1.8 2.3 2.8 3.3 nonswitching vout quiescent current (a) input voltage (v) t a = ?40c t a = +25c t a = +45c t a = +85c 10276-009 figure 9. nonswitching pfm mode quiescent current vs. input voltage 5 4 3 2 1 0 0.9 1.4 1.9 2.4 2.9 shutdown current (a) input voltage (v) t a = ?40c t a = +25c t a = +45c t a = +90c 10276-010 figure 10 . shutdown current vs. input voltage 170 155 140 125 110 95 1.8 2.3 2.8 3.3 nmos r dson (m?) output voltage (v) t a = ?40c t a = +25c t a = +90c i sw = 500ma 10276-0 1 1 figure 11 . nmos drain - to- source on resistance 270 240 210 180 150 120 1.8 2.3 2.8 3.3 pmos r dson (m?) output voltage (v) t a = ?40c t a = +25c t a = +90c i sw = 500ma 10276-012 figure 12 . pmos drain - to- source on resistance 1200 1100 1000 900 800 700 0.8 1.3 1.8 2.3 2.8 3.3 current limit (ma) input voltage (v) v out = 1.8 v v out = 2.5v v out = 3.3v 10276-013 figure 13 . switch current limit vs. input voltage 140 120 100 80 60 40 20 0 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 load current (ma) input voltage (v) v out = 2.5v pwm operation pfm operation 10276-014 figure 14 . auto mode transition thresh olds
adp1607 data sheet rev. c | page 8 of 16 88.4 88.0 87.6 87.2 86.8 86.4 1.8 2.3 2.8 3.3 maximum duty cycle (%) output voltage (v) t a = ?40c t a =+25c t a =+90c 10276-015 figure 15. maximum duty cycle vs. output voltage 2.04 2.02 2.00 1.98 1.96 1.94 ?40 ?10 20 50 80 frequency (mhz) temperature (c) v out = 1.8v v out = 3.3v v out = 2.5v 10276-016 figure 16. frequency vs. temperature 1000 800 600 400 200 900 700 500 300 100 0 0.8 1.3 1.8 2.3 2.8 3.3 maximum output current (ma) input voltage (v) v out = 1.8 v v out = 2.5v v out = 3.3v 10276-017 figure 17. maximum output current vs. input voltage time (200s/div) v in = 1.2v v out = 3.3v i load = 1ma to 50ma load current (50ma/div) output voltage (100mv/div) ac-coupled 10276-018 1 4 figure 18. pfm mode load transient response (auto mode part) time (200s/div) v in = 1.2v v out = 3.3v i load = 50ma to 100ma load current (50ma/div) output voltage (100mv/div) ac-coupled 10276-019 1 4 figure 19. pwm mode load transient response (fixed pwm mode part) time (200s/div) v in = 1.2v v out = 3.3v r load = 3.3k ? en pin voltage (1v/div) inductor current (200ma/div) sw pin voltage (2v/div) output voltage (1v/div) 10276-020 1 4 3 2 figure 20. startup, r load =3.3 k
data sheet adp1607 rev. c | page 9 of 16 time (200s/div) v in = 1.2v v out = 3.3v r load = 33 ? en pin voltage (1v/div) inductor current (500ma/div) sw pin voltage (2v/div) output voltage (1v/div) 10276-021 1 4 3 2 figure 21. startup, r load = 33 time (10s/div) v in = 1.2v v out = 3.3v i load = 10ma inductor current (200ma/div) sw pin voltage (2v/div) output voltage (100mv/div) ac coupled 10276-022 1 4 2 figure 22. typical pfm mode operation, i load = 10 ma time (400ns/div) v in = 1.2v v out = 3.3v i load = 100ma inductor current (100ma/div) sw pin voltage (2v/div) output voltage (20mv/div) ac coupled 10276-023 1 4 2 figure 23. typical pwm mode operation, i load = 100 ma
adp1607 data sheet rev. c | page 10 of 16 theory of opera tion sw + + vin n reset agnd gnd t sense t ref 1 v dd l1 a v out c out 5 2 4 en v in s r qp qn rp v sel sw p 6 v sel v in off on 3 fb r1 r2 v out c in v ref pfm comparator pwm comparator current-limit comparator tsd comparator pfm control shutdown zero cross pmos bulk control p driver current sensing n driver oscillator soft start r comp c comp error amplifier v ref bulk control v out 10276-033 figure 24 . block diagram overview the adp1607 is a high efficiency, sy nchronous, fixed frequency, step - up dc - to - dc switching converter with an adj ustable output voltage between 1 .8 v and 3.3 v for use in portable applications. the 2 mhz operating frequency enables the use of small footprint, low profile external components . additionally, the synchronous rectification, internal compensation, internal f ixed current limit, and current - mode architecture allow for excellent transient response and a minimal external part count. other key features include fixed pwm and light load pfm mode options, true output isolation, thermal shutdown (tsd), and logic controlled enable. enable/shutdown the en input turns the adp1607 on or off. connect en to gnd or logic low to shut down the part and reduce the current consumption to 0. 06 a (typical). connect en to vin or logic high to enable the part. do not exceed v in . do not leave this pin flo ating. modes of operation the adp1607 is available in a fixed pwm mode only option for noise sensitiv e applications or in an auto pfm - to - pwm transitioning mode option to optimize power at light loads. pulse - width modulation (pwm) mode the pwm version of the adp1607 utilizes a current - mode pwm control scheme to force the part to maintain a fixed 2 mhz fixed frequency while regulating the output voltage over all load conditions. the auto mode v ersion of the adp1607 operate s in pwm for higher load currents. in pwm, the output voltage is monitored at the fb pin through the external resistive voltage divider. the voltage at fb is compared to the internal 1.2 59 v reference by the internal error amplifier. this current - mode pwm regulation system allows fast transient response and tight output voltage regulation. pw m mode operation results in lower efficiencies than pfm mode at light loads. auto mode auto mode is a power - saving feature that forces the auto version of the adp1607 to switch between pfm and pwm in response to output load changes. th e auto version of the adp1607
data sheet adp1607 rev. c | page 11 of 16 operates in pfm mode for light load currents and switches to pwm mode for medium and heavy load currents. pulse frequency modulation (pfm) when the auto mode version of the adp1607 is operating under light load conditions, the effective switching frequency and supply current are decreased and varied using pfm to regulate the output voltage. this results in improved efficiencies and lower quiescent currents. in pfm mode, the converter only switches when necessary to keep the output voltage between the pfm comparator high output voltage threshold and the lower sleep mode exit voltage threshold. switching stops when the upper pfm limit is reached and resumes when the lower sleep mode exit threshold is reached. when v out exceeds the upper pfm threshold, switching stops and the part enters sleep mode. in sleep mode, the adp1607 is mostly shut down, significantly reducing the quiescent current. the output voltage is then discharged by the load until the output voltage reaches the lower sleep mode exit threshold. after crossing the lower sleep mode exit threshold, switching resumes and the process repeats. mode transition the auto mode version of the adp1607 switches automatically between pfm and pwm modes to maintain optimal efficiency. switching to pfm allows the converter to save power by sup- plying the lighter load current with fewer switching cycles. the mode transition point depends on the operating conditions. see figure 14 for typical transition levels for v out = 2.5 v. hysteresis exists in the transition point to prevent instability and decreased efficiencies that may result if the converter oscillates between pfm and pwm for a fixed input voltage and load current. the output voltage in pwm can be above or below the pfm voltage of that part. internal control features input to output isolation while in shutdown, the adp1607 manages the voltage of the bulk of the pmos to force it off and internally isolate the path from the input to output. this allows the output to drop to ground, reducing the current consumption of the application in shutdown. soft start the adp1607 soft start sequence is designed for optimal control of the part. when en goes high, or when the part recovers from a tsd, the start-up sequence begins. the output voltage increases through a sequence of stages to ensure that the internal circuitry is powered up in the correct order as the output voltage rises to its final value. current limit the adp1607 is designed with a fixed 1 a typical current limit that does not vary with duty cycle. synchronous rectification in addition to the n-channel mosfet switch, the adp1607 has a p-channel mosfet switch to build the synchronous rectifier. the synchronous rectifier improves efficiency, especially for heavy load currents, and reduces cost and board space by eliminating the need for an external schottky diode. compensation the pwm control loop of the adp1607 is internally compen- sated to deliver maximum performance with no additional external components. the adp1607 is designed to work with 2.2 h chip inductors and 10 f ceramic capacitors. other values may reduce performance and/or stability. thermal shutdown (tsd) protection the adp1607 includes thermal shutdown (tsd) protection when the part is in pwm mode only. if the die temperature exceeds 150c (typical), the tsd protection activates and turns off the power devices. they remain off until the die temperature falls below 135c (typical), at which point the converter restarts.
adp1607 data sheet rev. c | page 12 of 16 applications informa tion setting the output v oltage the adp1607 can be configured for output voltages between 1.8 v and 3.3 v. the output voltage is set by a resistor voltage divider, r1 , from the output voltage (v out ) to the 1.2 59 v feedback input at fb and r2 fr om fb to gnd (see figure 24 ). resistances between 100 k? and 1 m? are recommended. for larger r 1 and r2 values, the voltage drop due to the fb pin current (i fb ) on r1 becomes proportionally significant and needs to be factored in. to account for the effect of i fb for all values of r1 and r2, u se the follow ing equation to determine r1 and r2 for the desired v out : ) ( 1 r1 i v r2 r1 v fb fb out + ? ? ? ? ? ? + = (1) where: v fb = 1.259 v, typical i fb = 0.1 a , typical inductor selection the adp1607 is designed with a 2 mhz operating frequency enabling the use of small chip inductors ideal for use in applications with limited solution size constraints. the adp1607 is designed for optimal performance with 2.2 h inductors , which have favorable saturation currents and lower series resista nces for their given physical size. to ensure stable and efficient performance with the adp1607 , care should be taken to select a compatible inductor with a sufficient current rating, saturation current, and low dc resistance (dcr.) the maximum rated rms current of the inductor must be greater than the maximum input current to the regulator. likewise, the saturation current of the chosen inductor must be able to support the peak inductor current (the maximum input current plus half the inductor ripple current) of the application. the inductor ripple current ( ? i l ) in steady state continuous mode can be calc ulated as sw in l f l d v i = ? (2) where: d is the duty cycle of the application. l is the inductor value. f sw is the switching frequency of the adp1607 . the switch duty cycle (d) is determined by the input (v in ) and output (v out ) voltages with the following equation: out in out v v v d ? = (3) inductors with a low dcr minimize power loss and improve effi ciency. dcr values below 100 m? are recommended. table 5 . suggested inductors manufacturer part number inductance (h) dcr (m ? ) typ current rating (a) saturation current (a) size (l w h) (mm) package tdk mlp2016s2r2m 2.2 20% 110 1.20 2.00 1.60 1.00 0806 mlp2520s2r2s 2.2 2 0% 110 1.20 1.20 2.50 2.00 1.00 1008 vlf252012mt - 2r2m 2.2 2 0% 57 1.67 1.04 2.50 2.00 1.00 1008 vlf302510mt - 2r2m 2.2 2 0% 70 1.23 1.37 3.00 2.50 1.00 vlf302515mt - 2r2m 2.2 2 0% 4 2 2.71 1.57 3.00 2.50 1.40 murata lqm2hpn2r2mg0 2.2 20% 80 1.30 2.50 2.00 0.90 1008 lqh32pn2r2nnc 2.2 30% 64 1.85 3.20 2.50 1.55 1210 wurth 74479787 222 2.2 20% 80 1.50 0.70 2.50 2.00 1.00 1008 7440430 022 2.2 30% 23 2.50 2.3 5 4.80 48.0 2.80 taiyo yuden brc2012t2r2md 2.2 20% 110 1.00 1.10 2.00 1.25 1.40 0805 toko mdt2520 - cr2r2m 2.2 20% 90 1.35 2.50 2.00 1.00 1008 dem2810c (1224as - h - 2r2m) 2.2 20% 85 1.10 1.40 3.20 3.00 1.00 dem2815c (1226as - h - 2r2m ) 2.2 20% 43 1.40 2.20 3.20 3.00 1.50 coilcraft xfl3012 - 222 2.2 20% 81 1.9 1.6 3.00 3.00 1.20 1212 xfl4020 - 222 2.2 10% 21 8.0 3.1 4.00 4.00 2.10 1515
data sheet adp1607 rev. c | page 13 of 16 choosing the input c apacitor the adp1607 requires a 10 f or greater input bypass capa citor (c in ) between vin and gnd to supply transient currents while maintaining a constant input v oltage. the value of the input capacitor can be increased without any limit for smaller input voltage ripple and better input voltage filtering. the capacitor must have a 4 v or higher voltage rating to support the maximum input operating voltage. it is re commended that c in be placed as close to the adp1607 as possible. different types of capacitors can be considered, but f or battery - powered applications, the best choice is the multilayer ceramic capacitor, due to its small size, low equivalent series resistance (esr), and low equivalent series inductance (esl). x5r or x7r dielectrics are recommended . y5v ca pacitors should not be used due to their variation in capacitance over temperature. alterna - tively, use a high value, medium esr capacitor in parallel with a 0.1 f low esr capacitor. choosing the output capacitor the adp1607 also requires a 10 f output capacitor (c out ) to maintain the output voltage and supply current to the load. the output capacitor sup plies the current to the load when the n - channel switch is turned on. similar to c in , a 4 v or greater, low esr, x5r or x7r ceramic capacitor is recommended for c out . w hen choosing the output capacitor, it is also important to acco unt for the loss of capac itance due to output voltage dc bias. this may result in using a capacitor with a higher rated voltage to achieve the desired capacitance value. see figure 25 for an example of how the capacitance of a 10 f ceramic capacitor chan ges with the dc bias voltage. 0 2 4 6 8 10 12 0 1 2 3 4 5 6 10276-034 dc bias voltage (v) capacitance (f) figure 25 . typical ceramic capacitor performance the value and characteristics of the output capacitor greatly affect the output voltage ripple, transient performance, and stability of the regulator. the output voltage ripple ( ? v out ) in continuous operation is calculated as follows: out on out out c out c t i c q v = = ? (4) where: q c is the charge removed from the capacitor. t on is the on time of the n - channel switch. c out is the effective output capacitance. i out i s the output load current . sw on f d t = (5) and, out in out v v v d ? = (6) as shown in the duty cycle and output ripple voltage equations, the output voltage ripple increase s with the load current.
adp1607 data sheet rev. c | page 14 of 16 layout guidelines 10276-035 1 2 3 4 5 6 en gnd sw vout fb vin r1 0402 r2 0402 c out 0402 c in 0402 3.0mm 6.5mm adp1607 top view 7 epad l 2.2h 0805 figure 26 . adp1607 recommended layout showing the smallest footprin t for high efficiency, good regula tion, and stability, a well - designed printed circuit board layout is required. use the following guidelines when designing printed circuit boards (also see figure 24 for a block diagram and figure 2 for a pin configuration). ? keep the low esr input capacitor, c in , close to vin and gnd. this minimizes noise injected into the part from board parasitic inductance. ? keep the high current path from c in through the l1 inductor to sw as short as possible. ? place the feedback resistors, r1 and r2, as close to fb as possible to prevent noise pickup. connect the ground of the feedback network directly to an agnd plane that makes a kelvin connection to the gnd pin. ? avoid routing high impedance traces from feedback re sistors near any node connected to sw or near the inductor to prevent radiated noise injection. ? keep the low esr output capacitor, c out , close to vout and gnd. this minimizes noise injected into the part from board parasitic inductance. ? connect pin 7 (epad) and gnd to a large copper plane for proper heat dissipation.
data sheet adp1607 rev. c | page 15 of 16 outline dimensions 1.70 1.60 1.50 0.425 0.350 0.275 top view 6 1 4 3 0.35 0.30 0.25 bottom view pin 1 index area seating plane 0.60 0.55 0.50 1.10 1.00 0.90 0.20 ref 0.05 max 0.02 nom 0.65 bsc exposed pad p i n 1 i n d i c a t o r ( r 0 . 1 5 ) for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 02-06-2013-d 0.15 ref 2.10 2.00 sq 1.90 0.20 min figure 27. 6-lead lead frame chip scale package [lfcsp_ud] 2.00 mm 2.00 mm body, ultra thin, dual lead (cp-6-3) dimensions shown in millimeters ordering guide model 1 output voltage operating modes temperature range package description package option branding adp1607acpzn-r7 adjustable auto C40c to +85c 6-lead lfcsp_ud cp-6-3 lj5 adp1607acpzn001-r7 adjustable pwm C40c to +85c 6-lead lfcsp_ud cp-6-3 lj1 adp1607-evalz auto evaluation board, automatic pfm/pwm switching modes ADP1607-001-EVALZ pwm evaluation board, pwm mode only 1 z = rohs compliant part.
adp1607 data sheet rev. c | page 16 of 16 notes ? 2012 C 2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10276 - 0- 12/13(c)

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